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/ Cream of the Crop 11 / Cream of the Crop 11-1.iso / windows / gtw95203.zip / STL00016.DA_ / STL00016.DA
Text File  |  1996-01-16  |  113KB  |  3,298 lines
  1. #
  2. #    $Id: stl00016.da@ 1.17 1996/01/15 18:42:01 jbrennei Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00016.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 175Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Dac=ibm525.dac
  14. Cursor=ibm525.cur
  15. PixClk=ibm525.clk
  16. Draweng=s3x68.drw
  17.  
  18. [BoardInfo]
  19. bViewports=1
  20. bNewMMIO=1
  21. bTwoPtLine=1
  22.  
  23. [Desktops]
  24. 2048,768,8
  25. 1600,1200,8
  26. 1280,1024,8
  27. 1152,864,16
  28. 1152,864,8
  29. 1024,1536,8
  30. 1024,768,16
  31. 1024,768,8
  32. 800,600,32
  33. 800,600,24
  34. 800,600,16
  35. 800,600,8
  36. 640,480,32
  37. 640,480,24
  38. 640,480,16
  39. 640,480,8
  40.  
  41. [Viewports]
  42. 1600,1200,8,82,66
  43. 1600,1200,8,75,60
  44. 1280,1024,8,95,90
  45. 1280,1024,8,79,75
  46. 1280,1024,8,76,72
  47. 1280,1024,8,64,60
  48. 1152,864,16,82,90
  49. 1152,864,16,71,75
  50. 1152,864,16,64,70
  51. 1152,864,16,56,60
  52. 1152,864,8,82,90
  53. 1152,864,8,71,75
  54. 1152,864,8,64,70
  55. 1152,864,8,56,60
  56. 1024,768,16,96,120
  57. 1024,768,16,81,100
  58. 1024,768,16,64,80
  59. 1024,768,16,60,75
  60. 1024,768,16,58,72
  61. 1024,768,16,56,70
  62. 1024,768,16,48,60
  63. 1024,768,8,96,120
  64. 1024,768,8,81,100
  65. 1024,768,8,64,80
  66. 1024,768,8,60,75
  67. 1024,768,8,58,72
  68. 1024,768,8,56,70
  69. 1024,768,8,48,60
  70. 800,600,32,75,120
  71. 800,600,32,64,100
  72. 800,600,32,56,90
  73. 800,600,32,46,75
  74. 800,600,32,48,72
  75. 800,600,32,37,60
  76. 800,600,32,35,56
  77. 800,600,24,75,120
  78. 800,600,24,64,100
  79. 800,600,24,56,90
  80. 800,600,24,46,75
  81. 800,600,24,48,72
  82. 800,600,24,37,60
  83. 800,600,24,35,56
  84. 800,600,16,75,120
  85. 800,600,16,64,100
  86. 800,600,16,56,90
  87. 800,600,16,46,75
  88. 800,600,16,48,72
  89. 800,600,16,37,60
  90. 800,600,16,35,56
  91. 800,600,8,75,120
  92. 800,600,8,64,100
  93. 800,600,8,56,90
  94. 800,600,8,46,75
  95. 800,600,8,48,72
  96. 800,600,8,37,60
  97. 800,600,8,35,56
  98. 640,480,32,64,120
  99. 640,480,32,52,100
  100. 640,480,32,48,90
  101. 640,480,32,37,75
  102. 640,480,32,37,72
  103. 640,480,32,31,60
  104. 640,480,24,64,120
  105. 640,480,24,52,100
  106. 640,480,24,48,90
  107. 640,480,24,37,75
  108. 640,480,24,37,72
  109. 640,480,24,31,60
  110. 640,480,16,64,120
  111. 640,480,16,52,100
  112. 640,480,16,48,90
  113. 640,480,16,37,75
  114. 640,480,16,37,72
  115. 640,480,16,31,60
  116. 640,480,8,64,120
  117. 640,480,8,52,100
  118. 640,480,8,48,90
  119. 640,480,8,37,75
  120. 640,480,8,37,72
  121. 640,480,8,31,60
  122.  
  123. [TextMode]
  124. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  125. SHELL, I10, 0x0003,  0x0000
  126. CRT, RUN, REG_LOCK_1, 0x48
  127. CRT, RUN, REG_LOCK_2, 0xA0
  128.  
  129. [GraphicsEnable]
  130. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  131. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  132.  
  133. [GraphicsDisable]
  134. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  135. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  136.  
  137. [2048,768,8]
  138. # Setting Line Pitch
  139. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  140. CRT,RUN,EXT_MODE,0x00
  141. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  142. # Setting Engine Pitch
  143. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  144. CRT,RUN,MEM_CONFIG,0x8f
  145. # Setting Basic Mode Registers.The registers
  146. # below are neither Desktop or Viewport Regs
  147. # Unlock Sequencer
  148. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  149. # Dump Sequencer Registers
  150. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  151. # Dump Graphics Controller Registers
  152. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  153. # Dump Attribute Controller Registers
  154. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  155. # Lock Sequencer
  156. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  157. DAC_IDR, RUN, DAC_OPERATION, 0x02
  158. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  159. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  160. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  161. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  162. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  163. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  164. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  165. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  166. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  167.  
  168. [1024,1536,8]
  169. # Setting Line Pitch
  170. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  171. CRT,RUN,EXT_MODE,0x00
  172. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  173. # Setting Engine Pitch
  174. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  175. CRT,RUN,MEM_CONFIG,0x09
  176. # Setting Basic Mode Registers.The registers
  177. # below are neither Desktop or Viewport Regs
  178. # Unlock Sequencer
  179. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  180. # Dump Sequencer Registers
  181. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  182. # Dump Graphics Controller Registers
  183. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  184. # Dump Attribute Controller Registers
  185. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  186. # Lock Sequencer
  187. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  188. DAC_IDR, RUN, DAC_OPERATION, 0x02
  189. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  190. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  191. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  192. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  193. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  194. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  195. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  196. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  197. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  198.  
  199. [1600,1200,8]
  200. # Setting Line Pitch
  201. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  202. CRT,RUN,EXT_MODE,0x00
  203. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  204. # Setting Engine Pitch
  205. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  206. CRT,RUN,MEM_CONFIG,0x8b
  207. # Setting Basic Mode Registers.The registers
  208. # below are neither Desktop or Viewport Regs
  209. # Unlock Sequencer
  210. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  211. # Dump Sequencer Registers
  212. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  213. # Dump Graphics Controller Registers
  214. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  215. # Dump Attribute Controller Registers
  216. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  217. # Lock Sequencer
  218. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  219. DAC_IDR, RUN, DAC_OPERATION, 0x02
  220. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  221. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  222. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  223. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  224. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  225. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  226. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  227. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  228. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  229.  
  230. [1280,1024,8]
  231. # Setting Line Pitch
  232. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  233. CRT,RUN,EXT_MODE,0x00
  234. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  235. # Setting Engine Pitch
  236. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  237. CRT,RUN,MEM_CONFIG,0x0b
  238. # Setting Basic Mode Registers.The registers
  239. # below are neither Desktop or Viewport Regs
  240. # Unlock Sequencer
  241. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  242. # Dump Sequencer Registers
  243. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  244. # Dump Graphics Controller Registers
  245. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  246. # Dump Attribute Controller Registers
  247. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  248. # Lock Sequencer
  249. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  250. DAC_IDR, RUN, DAC_OPERATION, 0x02
  251. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  252. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  253. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  254. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  255. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  256. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  257. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  258. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  259. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  260.  
  261. [1152,864,16]
  262. # Setting Line Pitch
  263. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  264. CRT,RUN,EXT_MODE,0x00
  265. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  266. # Setting Engine Pitch
  267. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  268. CRT,RUN,MEM_CONFIG,0x89
  269. # Setting Basic Mode Registers.The registers
  270. # below are neither Desktop or Viewport Regs
  271. # Unlock Sequencer
  272. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  273. # Dump Sequencer Registers
  274. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  275. # Dump Graphics Controller Registers
  276. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  277. # Dump Attribute Controller Registers
  278. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  279. # Lock Sequencer
  280. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  281. DAC_IDR, RUN, DAC_OPERATION, 0x02
  282. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  283. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  284. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  285. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  286. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  287. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  288. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  289. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  290. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  291.  
  292. [1152,864,8]
  293. # Setting Line Pitch
  294. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  295. CRT,RUN,EXT_MODE,0x00
  296. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  297. # Setting Engine Pitch
  298. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  299. CRT,RUN,MEM_CONFIG,0x89
  300. # Setting Basic Mode Registers.The registers
  301. # below are neither Desktop or Viewport Regs
  302. # Unlock Sequencer
  303. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  304. # Dump Sequencer Registers
  305. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  306. # Dump Graphics Controller Registers
  307. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  308. # Dump Attribute Controller Registers
  309. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  310. # Lock Sequencer
  311. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  312. DAC_IDR, RUN, DAC_OPERATION, 0x02
  313. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  314. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  315. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  316. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  317. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  318. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  319. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  320. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  321. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  322.  
  323. [1024,768,16]
  324. # Setting Line Pitch
  325. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  326. CRT,RUN,EXT_MODE,0x00
  327. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  328. # Setting Engine Pitch
  329. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  330. CRT,RUN,MEM_CONFIG,0x89
  331. # Setting Basic Mode Registers.The registers
  332. # below are neither Desktop or Viewport Regs
  333. # Unlock Sequencer
  334. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  335. # Dump Sequencer Registers
  336. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  337. # Dump Graphics Controller Registers
  338. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  339. # Dump Attribute Controller Registers
  340. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  341. # Lock Sequencer
  342. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  343. DAC_IDR, RUN, DAC_OPERATION, 0x02
  344. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  345. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  346. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  347. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  348. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  349. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  350. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  351. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  352. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  353.  
  354. [1024,768,8]
  355. # Setting Line Pitch
  356. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  357. CRT,RUN,EXT_MODE,0x00
  358. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  359. # Setting Engine Pitch
  360. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  361. CRT,RUN,MEM_CONFIG,0x09
  362. # Setting Basic Mode Registers.The registers
  363. # below are neither Desktop or Viewport Regs
  364. # Unlock Sequencer
  365. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  366. # Dump Sequencer Registers
  367. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  368. # Dump Graphics Controller Registers
  369. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  370. # Dump Attribute Controller Registers
  371. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  372. # Lock Sequencer
  373. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  374. DAC_IDR, RUN, DAC_OPERATION, 0x02
  375. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  376. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  377. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  378. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  379. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  380. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  381. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  382. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  383. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  384.  
  385. [800,600,32]
  386. # Setting Line Pitch
  387. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  388. CRT,RUN,EXT_MODE,0x00
  389. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  390. # Setting Engine Pitch
  391. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  392. CRT,RUN,MEM_CONFIG,0x89
  393. # Setting Basic Mode Registers.The registers
  394. # below are neither Desktop or Viewport Regs
  395. # Unlock Sequencer
  396. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  397. # Dump Sequencer Registers
  398. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  399. # Dump Graphics Controller Registers
  400. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  401. # Dump Attribute Controller Registers
  402. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  403. # Lock Sequencer
  404. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  405. DAC_IDR, RUN, DAC_OPERATION, 0x02
  406. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  407. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  408. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  409. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  410. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  411. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  412. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  413. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  414. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  415.  
  416. [800,600,24]
  417. # Setting Line Pitch
  418. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  419. CRT,RUN,EXT_MODE,0x00
  420. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  421. # Setting Engine Pitch
  422. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  423. CRT,RUN,MEM_CONFIG,0x8b
  424. # Setting Basic Mode Registers.The registers
  425. # below are neither Desktop or Viewport Regs
  426. # Unlock Sequencer
  427. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  428. # Dump Sequencer Registers
  429. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  430. # Dump Graphics Controller Registers
  431. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  432. # Dump Attribute Controller Registers
  433. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  434. # Lock Sequencer
  435. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  436. DAC_IDR, RUN, DAC_OPERATION, 0x02
  437. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  438. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  439. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  440. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  441. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  442. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  443. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  444. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  445. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  446.  
  447.  
  448. [800,600,16]
  449. # Setting Line Pitch
  450. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  451. CRT,RUN,EXT_MODE,0x00
  452. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  453. # Setting Engine Pitch
  454. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  455. CRT,RUN,MEM_CONFIG,0x89
  456. # Setting Basic Mode Registers.The registers
  457. # below are neither Desktop or Viewport Regs
  458. # Unlock Sequencer
  459. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  460. # Dump Sequencer Registers
  461. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  462. # Dump Graphics Controller Registers
  463. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  464. # Dump Attribute Controller Registers
  465. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  466. # Lock Sequencer
  467. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  468. DAC_IDR, RUN, DAC_OPERATION, 0x02
  469. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  470. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  471. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  472. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  473. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  474. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  475. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  476. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  477. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  478.  
  479. [800,600,8]
  480. # Setting Line Pitch
  481. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  482. CRT,RUN,EXT_MODE,0x00
  483. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  484. # Setting Engine Pitch
  485. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  486. CRT,RUN,MEM_CONFIG,0x89
  487. # Setting Basic Mode Registers.The registers
  488. # below are neither Desktop or Viewport Regs
  489. # Unlock Sequencer
  490. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  491. # Dump Sequencer Registers
  492. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  493. # Dump Graphics Controller Registers
  494. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  495. # Dump Attribute Controller Registers
  496. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  497. # Lock Sequencer
  498. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  499. DAC_IDR, RUN, DAC_OPERATION, 0x02
  500. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  501. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  502. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  503. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  504. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  505. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  506. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  507. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  508. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  509.  
  510. [640,480,32]
  511. # Setting Line Pitch
  512. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  513. CRT,RUN,EXT_MODE,0x00
  514. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  515. # Setting Engine Pitch
  516. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  517. CRT,RUN,MEM_CONFIG,0x89
  518. # Setting Basic Mode Registers.The registers
  519. # below are neither Desktop or Viewport Regs
  520. # Unlock Sequencer
  521. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  522. # Dump Sequencer Registers
  523. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  524. # Dump Graphics Controller Registers
  525. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  526. # Dump Attribute Controller Registers
  527. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  528. # Lock Sequencer
  529. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  530. DAC_IDR, RUN, DAC_OPERATION, 0x02
  531. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  532. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  533. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  534. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  535. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  536. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  537. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  538. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  539. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  540.  
  541. [640,480,24]
  542. # Setting Line Pitch
  543. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  544. CRT,RUN,EXT_MODE,0x00
  545. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  546. # Setting Engine Pitch
  547. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  548. CRT,RUN,MEM_CONFIG,0x8b
  549. # Setting Basic Mode Registers.The registers
  550. # below are neither Desktop or Viewport Regs
  551. # Unlock Sequencer
  552. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  553. # Dump Sequencer Registers
  554. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  555. # Dump Graphics Controller Registers
  556. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  557. # Dump Attribute Controller Registers
  558. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  559. # Lock Sequencer
  560. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  561. DAC_IDR, RUN, DAC_OPERATION, 0x02
  562. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  563. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  564. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  565. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  566. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  567. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  568. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  569. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  570. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  571.  
  572.  
  573. [640,480,16]
  574. # Setting Line Pitch
  575. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  576. CRT,RUN,EXT_MODE,0x00
  577. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  578. # Setting Engine Pitch
  579. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  580. CRT,RUN,MEM_CONFIG,0x89
  581. # Setting Basic Mode Registers.The registers
  582. # below are neither Desktop or Viewport Regs
  583. # Unlock Sequencer
  584. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  585. # Dump Sequencer Registers
  586. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  587. # Dump Graphics Controller Registers
  588. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  589. # Dump Attribute Controller Registers
  590. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  591. # Lock Sequencer
  592. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  593. DAC_IDR, RUN, DAC_OPERATION, 0x02
  594. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  595. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  596. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  597. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  598. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  599. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  600. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  601. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  602. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  603.  
  604. [640,480,8]
  605. # Setting Line Pitch
  606. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  607. CRT,RUN,EXT_MODE,0x00
  608. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  609. # Setting Engine Pitch
  610. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  611. CRT,RUN,MEM_CONFIG,0x89
  612. # Setting Basic Mode Registers.The registers
  613. # below are neither Desktop or Viewport Regs
  614. # Unlock Sequencer
  615. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  616. # Dump Sequencer Registers
  617. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  618. # Dump Graphics Controller Registers
  619. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  620. # Dump Attribute Controller Registers
  621. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  622. # Lock Sequencer
  623. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  624. DAC_IDR, RUN, DAC_OPERATION, 0x02
  625. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  626. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  627. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  628. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  629. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  630. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  631. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  632. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  633. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  634.  
  635. [1600,1200,8,82,66]
  636. # Unlock CRTC
  637. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  638. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  639. CRT,RUN,REG_LOCK_1,0x48,0xa5
  640. # Dump CRT Controller Registers
  641. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  642. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  643. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  644. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  645. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  646. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  647. CRT,RUN,MODE_CONTROL,0x02
  648. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  649. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  650. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  651. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  652. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  653. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  654. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  655. # Lock CRTC Reg 11 for compatibility
  656. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  657. # Dump ENG Register
  658. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  659. # Dump MISCOUT Register
  660. DIR,RUN,MISC_WRITE,0xef
  661. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  662. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  663. CLK_IND, RUN, FREQ_2, 0xd3
  664. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  665. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  666. CRT,RUN,LATCH_DATA, 0x08
  667.  
  668. [1600,1200,8,75,60]
  669. # Unlock CRTC
  670. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  671. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  672. CRT,RUN,REG_LOCK_1,0x48,0xa5
  673. # Dump CRT Controller Registers
  674. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  675. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  676. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  677. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  678. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  679. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  680. CRT,RUN,MODE_CONTROL,0x02
  681. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  682. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  683. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  684. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  685. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  686. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  687. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  688. # Lock CRTC Reg 11 for compatibility
  689. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  690. # Dump ENG Register
  691. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  692. # Dump MISCOUT Register
  693. DIR,RUN,MISC_WRITE,0xef
  694. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  695. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  696. CLK_IND, RUN, FREQ_2, 0xcd
  697. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  698. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  699. CRT,RUN,LATCH_DATA, 0x08
  700.  
  701. [1280,1024,8,95,90]
  702. # Unlock CRTC
  703. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  704. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  705. CRT,RUN,REG_LOCK_1,0x48,0xa5
  706. # Dump CRT Controller Registers
  707. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  708. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  709. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  710. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  711. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  712. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  713. CRT,RUN,MODE_CONTROL,0x02
  714. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  715. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  716. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  717. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  718. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  719. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  720. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  721. # Lock CRTC Reg 11 for compatibility
  722. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  723. # Dump ENG Register
  724. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  725. # Dump MISCOUT Register
  726. DIR,RUN,MISC_WRITE,0xef
  727. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  728. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  729. CLK_IND, RUN, FREQ_2, 0xd0
  730. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  731. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  732. CRT,RUN,LATCH_DATA, 0x08
  733.  
  734.  
  735. [1280,1024,8,79,75]
  736. # Unlock CRTC
  737. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  738. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  739. CRT,RUN,REG_LOCK_1,0x48,0xa5
  740. # Dump CRT Controller Registers
  741. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  742. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  743. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  744. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  745. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  746. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  747. CRT,RUN,MODE_CONTROL,0x02
  748. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  749. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  750. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  751. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  752. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  753. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  754. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  755. # Lock CRTC Reg 11 for compatibility
  756. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  757. # Dump ENG Register
  758. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  759. # Dump MISCOUT Register
  760. DIR,RUN,MISC_WRITE,0xef
  761. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  762. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  763. CLK_IND, RUN, FREQ_2, 0xc1
  764. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  765. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  766. CRT,RUN,LATCH_DATA, 0x08
  767.  
  768. [1280,1024,8,76,72]
  769. # Unlock CRTC
  770. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  771. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  772. CRT,RUN,REG_LOCK_1,0x48,0xa5
  773. # Dump CRT Controller Registers
  774. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  775. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  776. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  777. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  778. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  779. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  780. CRT,RUN,MODE_CONTROL,0x02
  781. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  782. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  783. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  784. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  785. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  786. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  787. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  788. # Lock CRTC Reg 11 for compatibility
  789. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  790. # Dump ENG Register
  791. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  792. # Dump MISCOUT Register
  793. DIR,RUN,MISC_WRITE,0xef
  794. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  795. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  796. CLK_IND, RUN, FREQ_2, 0xc1
  797. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  798. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  799. CRT,RUN,LATCH_DATA, 0x08
  800.  
  801. [1280,1024,8,64,60]
  802. # Unlock CRTC
  803. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  804. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  805. CRT,RUN,REG_LOCK_1,0x48,0xa5
  806. # Dump CRT Controller Registers
  807. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  808. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  809. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  810. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  811. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  812. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  813. CRT,RUN,MODE_CONTROL,0x02
  814. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  815. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  816. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  817. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  818. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  819. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  820. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  821. # Lock CRTC Reg 11 for compatibility
  822. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  823. # Dump ENG Register
  824. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  825. # Dump MISCOUT Register
  826. DIR,RUN,MISC_WRITE,0xef
  827. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  828. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  829. CLK_IND, RUN, FREQ_2, 0xab
  830. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  831. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  832. CRT,RUN,LATCH_DATA, 0x08
  833.  
  834. [1152,864,8,82,90]
  835. # Unlock CRTC
  836. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  837. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  838. CRT,RUN,REG_LOCK_1,0x48,0xa5
  839. # Dump CRT Controller Registers
  840. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  841. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  842. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  843. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  844. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  845. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  846. CRT,RUN,MODE_CONTROL,0x02
  847. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  848. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  849. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  850. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  851. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  852. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  853. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  854. # Lock CRTC Reg 11 for compatibility
  855. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  856. # Dump ENG Register
  857. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  858. # Dump MISCOUT Register
  859. DIR,RUN,MISC_WRITE,0xef
  860. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  861. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  862. CLK_IND, RUN, FREQ_2, 0xb9
  863. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  864. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  865. CRT,RUN,LATCH_DATA, 0x08
  866.  
  867. [1152,864,8,71,75]
  868. # Unlock CRTC
  869. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  870. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  871. CRT,RUN,REG_LOCK_1,0x48,0xa5
  872. # Dump CRT Controller Registers
  873. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  874. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  875. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  876. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  877. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  878. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  879. CRT,RUN,MODE_CONTROL,0x02
  880. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  881. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  882. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  883. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  884. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  885. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  886. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  887. # Lock CRTC Reg 11 for compatibility
  888. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  889. # Dump ENG Register
  890. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  891. # Dump MISCOUT Register
  892. DIR,RUN,MISC_WRITE,0xef
  893. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  894. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  895. CLK_IND, RUN, FREQ_2, 0xa9
  896. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  897. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  898. CRT,RUN,LATCH_DATA, 0x08
  899.  
  900. [1152,864,8,64,70]
  901. # Unlock CRTC
  902. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  903. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  904. CRT,RUN,REG_LOCK_1,0x48,0xa5
  905. # Dump CRT Controller Registers
  906. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  907. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  908. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  909. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  910. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  911. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  912. CRT,RUN,MODE_CONTROL,0x02
  913. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  914. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  915. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  916. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  917. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  918. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  919. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  920. # Lock CRTC Reg 11 for compatibility
  921. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  922. # Dump ENG Register
  923. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  924. # Dump MISCOUT Register
  925. DIR,RUN,MISC_WRITE,0xef
  926. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  927. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  928. CLK_IND, RUN, FREQ_2, 0x9b
  929. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  930. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  931. CRT,RUN,LATCH_DATA, 0x08
  932.  
  933. [1152,864,8,56,60]
  934. # Unlock CRTC
  935. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  936. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  937. CRT,RUN,REG_LOCK_1,0x48,0xa5
  938. # Dump CRT Controller Registers
  939. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  940. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  941. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  942. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  943. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  944. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  945. CRT,RUN,MODE_CONTROL,0x02
  946. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  947. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  948. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  949. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  950. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  951. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  952. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  953. # Lock CRTC Reg 11 for compatibility
  954. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  955. # Dump ENG Register
  956. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  957. # Dump MISCOUT Register
  958. DIR,RUN,MISC_WRITE,0xef
  959. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  960. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  961. CLK_IND, RUN, FREQ_2, 0x90
  962. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  963. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  964. CRT,RUN,LATCH_DATA, 0x08
  965.  
  966.  
  967. [1152,864,16,82,90]
  968. # Unlock CRTC
  969. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  970. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  971. CRT,RUN,REG_LOCK_1,0x48,0xa5
  972. # Dump CRT Controller Registers
  973. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  974. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  975. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  976. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  977. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  978. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  979. CRT,RUN,MODE_CONTROL,0x02
  980. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  981. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  982. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  983. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  984. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  985. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  986. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  987. # Lock CRTC Reg 11 for compatibility
  988. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  989. # Dump ENG Register
  990. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  991. # Dump MISCOUT Register
  992. DIR,RUN,MISC_WRITE,0xef
  993. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  994. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  995. CLK_IND, RUN, FREQ_2, 0xb9
  996. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  997. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  998. CRT,RUN,LATCH_DATA, 0x00
  999.  
  1000.  
  1001. [1152,864,16,71,75]
  1002. # Unlock CRTC
  1003. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1004. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1005. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1006. # Dump CRT Controller Registers
  1007. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1008. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1009. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1010. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1011. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1012. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1013. CRT,RUN,MODE_CONTROL,0x02
  1014. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1015. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1016. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1017. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1018. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1019. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1020. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1021. # Lock CRTC Reg 11 for compatibility
  1022. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1023. # Dump ENG Register
  1024. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1025. # Dump MISCOUT Register
  1026. DIR,RUN,MISC_WRITE,0xef
  1027. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1028. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1029. CLK_IND, RUN, FREQ_2, 0xa9
  1030. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1031. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1032. CRT,RUN,LATCH_DATA, 0x00
  1033.  
  1034.  
  1035. [1152,864,16,64,70]
  1036. # Unlock CRTC
  1037. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1038. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1039. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1040. # Dump CRT Controller Registers
  1041. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1042. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1043. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1044. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1045. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1046. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1047. CRT,RUN,MODE_CONTROL,0x02
  1048. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1049. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1050. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1051. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1052. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1053. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1054. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1055. # Lock CRTC Reg 11 for compatibility
  1056. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1057. # Dump ENG Register
  1058. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1059. # Dump MISCOUT Register
  1060. DIR,RUN,MISC_WRITE,0xef
  1061. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1062. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1063. CLK_IND, RUN, FREQ_2, 0x9b
  1064. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1065. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1066. CRT,RUN,LATCH_DATA, 0x00
  1067.  
  1068. [1152,864,16,56,60]
  1069. # Unlock CRTC
  1070. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1071. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1072. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1073. # Dump CRT Controller Registers
  1074. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1075. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1076. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1077. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1078. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1079. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1080. CRT,RUN,MODE_CONTROL,0x02
  1081. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1082. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1083. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1084. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1085. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1086. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1087. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1088. # Lock CRTC Reg 11 for compatibility
  1089. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1090. # Dump ENG Register
  1091. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1092. # Dump MISCOUT Register
  1093. DIR,RUN,MISC_WRITE,0xef
  1094. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1095. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1096. CLK_IND, RUN, FREQ_2, 0x90
  1097. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1098. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1099. CRT,RUN,LATCH_DATA, 0x00
  1100.  
  1101. [1024,768,16,96,120]
  1102. # Unlock CRTC
  1103. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1104. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1105. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1106. # Dump CRT Controller Registers
  1107. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1108. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1109. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1110. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1111. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1112. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1113. CRT,RUN,MODE_CONTROL,0x02
  1114. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1115. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1116. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1117. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1118. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1119. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1120. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1121. # Lock CRTC Reg 11 for compatibility
  1122. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1123. # Dump ENG Register
  1124. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1125. # Dump MISCOUT Register
  1126. DIR,RUN,MISC_WRITE,0xef
  1127. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1128. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1129. CLK_IND, RUN, FREQ_2, 0xbd
  1130. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1131. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1132. CRT,RUN,LATCH_DATA, 0x00
  1133.  
  1134. [1024,768,16,81,100]
  1135. # Unlock CRTC
  1136. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1137. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1138. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1139. # Dump CRT Controller Registers
  1140. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1141. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1142. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1143. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1144. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1145. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1146. CRT,RUN,MODE_CONTROL,0x02
  1147. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1148. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1149. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1150. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1151. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1152. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1153. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1154. # Lock CRTC Reg 11 for compatibility
  1155. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1156. # Dump ENG Register
  1157. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1158. # Dump MISCOUT Register
  1159. DIR,RUN,MISC_WRITE,0xef
  1160. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1161. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1162. CLK_IND, RUN, FREQ_2, 0xa9
  1163. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1164. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1165. CRT,RUN,LATCH_DATA, 0x00
  1166.  
  1167. [1024,768,16,64,80]
  1168. # Unlock CRTC
  1169. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1170. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1171. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1172. # Dump CRT Controller Registers
  1173. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1174. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1175. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1176. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1177. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1178. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1179. CRT,RUN,MODE_CONTROL,0x02
  1180. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1181. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1182. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1183. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1184. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1185. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1186. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1187. # Lock CRTC Reg 11 for compatibility
  1188. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1189. # Dump ENG Register
  1190. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1191. # Dump MISCOUT Register
  1192. DIR,RUN,MISC_WRITE,0xef
  1193. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1194. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1195. CLK_IND, RUN, FREQ_2, 0x93
  1196. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1197. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1198. CRT,RUN,LATCH_DATA, 0x00
  1199.  
  1200. [1024,768,16,60,75]
  1201. # Unlock CRTC
  1202. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1203. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1204. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1205. # Dump CRT Controller Registers
  1206. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1207. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1208. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1209. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1210. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1211. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1212. CRT,RUN,MODE_CONTROL,0x02
  1213. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1214. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1215. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1216. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1217. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1218. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1219. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1220. # Lock CRTC Reg 11 for compatibility
  1221. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1222. # Dump ENG Register
  1223. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1224. # Dump MISCOUT Register
  1225. DIR,RUN,MISC_WRITE,0xef
  1226. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1227. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1228. CLK_IND, RUN, FREQ_2, 0x8c
  1229. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1230. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1231. CRT,RUN,LATCH_DATA, 0x00
  1232.  
  1233. [1024,768,16,58,72]
  1234. # Unlock CRTC
  1235. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1236. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1237. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1238. # Dump CRT Controller Registers
  1239. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1240. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1241. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1242. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1243. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1244. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1245. CRT,RUN,MODE_CONTROL,0x02
  1246. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1247. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1248. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1249. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1250. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1251. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1252. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1253. # Lock CRTC Reg 11 for compatibility
  1254. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1255. # Dump ENG Register
  1256. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1257. # Dump MISCOUT Register
  1258. DIR,RUN,MISC_WRITE,0xef
  1259. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1260. CLK_IND, RUN, FREQ_2,0x88
  1261. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1262. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1263. CLK_IND, RUN, FREQ_2, 0x88
  1264. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1265. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1266. CRT,RUN,LATCH_DATA, 0x00
  1267.  
  1268. [1024,768,16,56,70]
  1269. # Unlock CRTC
  1270. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1271. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1272. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1273. # Dump CRT Controller Registers
  1274. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1275. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1276. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1277. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1278. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1279. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1280. CRT,RUN,MODE_CONTROL,0x02
  1281. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1282. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1283. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1284. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1285. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1286. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1287. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1288. # Lock CRTC Reg 11 for compatibility
  1289. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1290. # Dump ENG Register
  1291. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1292. # Dump MISCOUT Register
  1293. DIR,RUN,MISC_WRITE,0xef
  1294. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1295. CLK_IND, RUN, FREQ_2,0x88
  1296. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1297. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1298. CLK_IND, RUN, FREQ_2, 0x88
  1299. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1300. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1301. CRT,RUN,LATCH_DATA, 0x00
  1302.  
  1303. [1024,768,16,48,60]
  1304. # Unlock CRTC
  1305. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1306. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1307. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1308. # Dump CRT Controller Registers
  1309. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1310. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1311. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1312. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1313. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1314. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1315. CRT,RUN,MODE_CONTROL,0x02
  1316. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1317. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1318. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1319. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1320. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1321. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1322. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1323. # Lock CRTC Reg 11 for compatibility
  1324. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1325. # Dump ENG Register
  1326. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1327. # Dump MISCOUT Register
  1328. DIR,RUN,MISC_WRITE,0xef
  1329. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1330. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1331. CLK_IND, RUN, FREQ_2, 0x7E
  1332. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1333. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1334. CRT,RUN,LATCH_DATA, 0x00
  1335.  
  1336. [1024,768,8,96,120]
  1337. # Unlock CRTC
  1338. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1339. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1340. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1341. # Dump CRT Controller Registers
  1342. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1343. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1344. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1345. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1346. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1347. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1348. CRT,RUN,MODE_CONTROL,0x02
  1349. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1350. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1351. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1352. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1353. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1354. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1355. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1356. # Lock CRTC Reg 11 for compatibility
  1357. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1358. # Dump ENG Register
  1359. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1360. # Dump MISCOUT Register
  1361. DIR,RUN,MISC_WRITE,0xef
  1362. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1363. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1364. CLK_IND, RUN, FREQ_2, 0xbd
  1365. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1366. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1367. CRT,RUN,LATCH_DATA, 0x08
  1368.  
  1369. [1024,768,8,81,100]
  1370. # Unlock CRTC
  1371. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1372. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1373. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1374. # Dump CRT Controller Registers
  1375. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1376. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1377. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1378. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1379. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1380. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1381. CRT,RUN,MODE_CONTROL,0x02
  1382. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1383. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1384. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1385. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1386. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1387. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1388. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1389. # Lock CRTC Reg 11 for compatibility
  1390. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1391. # Dump ENG Register
  1392. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1393. # Dump MISCOUT Register
  1394. DIR,RUN,MISC_WRITE,0xef
  1395. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1396. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1397. CLK_IND, RUN, FREQ_2, 0xa9
  1398. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1399. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1400. CRT,RUN,LATCH_DATA, 0x08
  1401.  
  1402.  
  1403. [1024,768,8,64,80]
  1404. # Unlock CRTC
  1405. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1406. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1407. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1408. # Dump CRT Controller Registers
  1409. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1410. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1411. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1412. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1413. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1414. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1415. CRT,RUN,MODE_CONTROL,0x02
  1416. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1417. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1418. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1419. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1420. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1421. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1422. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1423. # Lock CRTC Reg 11 for compatibility
  1424. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1425. # Dump ENG Register
  1426. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1427. # Dump MISCOUT Register
  1428. DIR,RUN,MISC_WRITE,0xef
  1429. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1430. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1431. CLK_IND, RUN, FREQ_2, 0x93
  1432. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1433. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1434. CRT,RUN,LATCH_DATA, 0x08
  1435.  
  1436. [1024,768,8,60,75]
  1437. # Unlock CRTC
  1438. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1439. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1440. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1441. # Dump CRT Controller Registers
  1442. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1443. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1444. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1445. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1446. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1447. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1448. CRT,RUN,MODE_CONTROL,0x02
  1449. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1450. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1451. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1452. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1453. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1454. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1455. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1456. # Lock CRTC Reg 11 for compatibility
  1457. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1458. # Dump ENG Register
  1459. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1460. # Dump MISCOUT Register
  1461. DIR,RUN,MISC_WRITE,0xef
  1462. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1463. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1464. CLK_IND, RUN, FREQ_2, 0x8c
  1465. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1466. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1467. CRT,RUN,LATCH_DATA, 0x08
  1468.  
  1469. [1024,768,8,58,72]
  1470. # Unlock CRTC
  1471. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1472. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1473. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1474. # Dump CRT Controller Registers
  1475. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1476. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1477. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1478. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1479. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1480. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1481. CRT,RUN,MODE_CONTROL,0x02
  1482. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1483. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1484. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1485. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1486. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1487. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1488. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1489. # Lock CRTC Reg 11 for compatibility
  1490. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1491. # Dump ENG Register
  1492. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1493. # Dump MISCOUT Register
  1494. DIR,RUN,MISC_WRITE,0xef
  1495. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1496. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1497. CLK_IND, RUN, FREQ_2, 0x88
  1498. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1499. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1500. CRT,RUN,LATCH_DATA, 0x08
  1501.  
  1502. [1024,768,8,56,70]
  1503. # Unlock CRTC
  1504. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1505. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1506. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1507. # Dump CRT Controller Registers
  1508. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1509. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1510. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1511. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1512. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1513. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1514. CRT,RUN,MODE_CONTROL,0x02
  1515. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1516. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1517. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1518. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1519. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1520. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1521. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1522. # Lock CRTC Reg 11 for compatibility
  1523. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1524. # Dump ENG Register
  1525. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1526. # Dump MISCOUT Register
  1527. DIR,RUN,MISC_WRITE,0xef
  1528. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1529. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1530. CLK_IND, RUN, FREQ_2, 0x88
  1531. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1532. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1533. CRT,RUN,LATCH_DATA, 0x08
  1534.  
  1535. [1024,768,8,48,60]
  1536. # Unlock CRTC
  1537. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1538. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1539. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1540. # Dump CRT Controller Registers
  1541. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1542. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1543. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1544. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1545. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1546. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1547. CRT,RUN,MODE_CONTROL,0x02
  1548. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1549. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1550. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1551. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1552. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1553. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1554. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1555. # Lock CRTC Reg 11 for compatibility
  1556. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1557. # Dump ENG Register
  1558. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1559. # Dump MISCOUT Register
  1560. DIR,RUN,MISC_WRITE,0xef
  1561. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1562. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1563. CLK_IND, RUN, FREQ_2, 0x7e
  1564. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1565. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1566. CRT,RUN,LATCH_DATA, 0x08
  1567.  
  1568. [800,600,32,75,120]
  1569. # Unlock CRTC
  1570. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1571. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1572. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1573. # Dump CRT Controller Registers
  1574. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1575. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1576. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1577. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1578. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1579. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1580. CRT,RUN,MODE_CONTROL,0x02
  1581. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1582. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1583. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1584. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1585. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1586. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1587. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1588. # Lock CRTC Reg 11 for compatibility
  1589. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1590. # Dump ENG Register
  1591. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1592. # Dump MISCOUT Register
  1593. DIR,RUN,MISC_WRITE,0xef
  1594. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1595. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1596. CLK_IND, RUN, FREQ_2, 0x8a
  1597. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1598. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1599. CRT,RUN,LATCH_DATA, 0x00
  1600.  
  1601. [800,600,32,64,100]
  1602. # Unlock CRTC
  1603. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1604. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1605. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1606. # Dump CRT Controller Registers
  1607. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1608. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1609. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1610. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1611. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1612. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1613. CRT,RUN,MODE_CONTROL,0x02
  1614. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1615. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1616. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1617. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1618. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1619. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1620. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1621. # Lock CRTC Reg 11 for compatibility
  1622. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1623. # Dump ENG Register
  1624. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1625. # Dump MISCOUT Register
  1626. DIR,RUN,MISC_WRITE,0xef
  1627. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1628. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1629. CLK_IND, RUN, FREQ_2, 0x7e
  1630. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1631. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1632. CRT,RUN,LATCH_DATA, 0x00
  1633.  
  1634. [800,600,32,56,90]
  1635. # Unlock CRTC
  1636. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1637. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1638. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1639. # Dump CRT Controller Registers
  1640. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1641. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1642. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1643. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1644. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1645. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1646. CRT,RUN,MODE_CONTROL,0x02
  1647. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1648. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1649. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1650. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1651. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1652. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1653. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1654. # Lock CRTC Reg 11 for compatibility
  1655. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1656. # Dump ENG Register
  1657. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1658. # Dump MISCOUT Register
  1659. DIR,RUN,MISC_WRITE,0xef
  1660. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1661. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1662. CLK_IND, RUN, FREQ_2, 0x70
  1663. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1664. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1665. CRT,RUN,LATCH_DATA, 0x00
  1666.  
  1667. [800,600,32,46,75]
  1668. # Unlock CRTC
  1669. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1670. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1671. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1672. # Dump CRT Controller Registers
  1673. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1674. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1675. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1676. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1677. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1678. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1679. CRT,RUN,MODE_CONTROL,0x02
  1680. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1681. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1682. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1683. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1684. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1685. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1686. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1687. # Lock CRTC Reg 11 for compatibility
  1688. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1689. # Dump ENG Register
  1690. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1691. # Dump MISCOUT Register
  1692. DIR,RUN,MISC_WRITE,0xef
  1693. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1694. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1695. CLK_IND, RUN, FREQ_2, 0x60
  1696. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1697. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1698. CRT,RUN,LATCH_DATA, 0x00
  1699.  
  1700. [800,600,32,48,72]
  1701. # Unlock CRTC
  1702. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1703. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1704. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1705. # Dump CRT Controller Registers
  1706. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1707. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1708. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1709. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1710. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1711. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1712. CRT,RUN,MODE_CONTROL,0x02
  1713. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1714. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1715. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1716. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1717. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1718. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1719. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1720. # Lock CRTC Reg 11 for compatibility
  1721. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1722. # Dump ENG Register
  1723. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1724. # Dump MISCOUT Register
  1725. DIR,RUN,MISC_WRITE,0xef
  1726. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1727. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1728. CLK_IND, RUN, FREQ_2, 0x61
  1729. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1730. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1731. CRT,RUN,LATCH_DATA, 0x00
  1732.  
  1733. [800,600,32,37,60]
  1734. # Unlock CRTC
  1735. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1736. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1737. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1738. # Dump CRT Controller Registers
  1739. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1740. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1741. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1742. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1743. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1744. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1745. CRT,RUN,MODE_CONTROL,0x02
  1746. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1747. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1748. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1749. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1750. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1751. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1752. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1753. # Lock CRTC Reg 11 for compatibility
  1754. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1755. # Dump ENG Register
  1756. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1757. # Dump MISCOUT Register
  1758. DIR,RUN,MISC_WRITE,0xef
  1759. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1760. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1761. CLK_IND, RUN, FREQ_2, 0x4D
  1762. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1763. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1764. CRT,RUN,LATCH_DATA, 0x00
  1765.  
  1766.  
  1767. [800,600,32,35,56]
  1768. # Unlock CRTC
  1769. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1770. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1771. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1772. # Dump CRT Controller Registers
  1773. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1774. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1775. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1776. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1777. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1778. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1779. CRT,RUN,MODE_CONTROL,0x02
  1780. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1781. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1782. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1783. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1784. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1785. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1786. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1787. # Lock CRTC Reg 11 for compatibility
  1788. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1789. # Dump ENG Register
  1790. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1791. # Dump MISCOUT Register
  1792. DIR,RUN,MISC_WRITE,0xef
  1793. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1794. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1795. CLK_IND, RUN, FREQ_2, 0x45
  1796. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1797. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1798. CRT,RUN,LATCH_DATA, 0x00
  1799.  
  1800. [800,600,24,75,120]
  1801. # Unlock CRTC
  1802. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1803. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1804. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1805. # Dump CRT Controller Registers
  1806. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1807. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1808. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1809. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1810. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1811. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1812. CRT,RUN,MODE_CONTROL,0x02
  1813. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1814. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1815. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1816. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1817. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1818. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1819. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1820. # Lock CRTC Reg 11 for compatibility
  1821. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1822. # Dump ENG Register
  1823. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1824. # Dump MISCOUT Register
  1825. DIR,RUN,MISC_WRITE,0xef
  1826. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1827. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1828. CLK_IND, RUN, FREQ_2, 0x8a
  1829. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1830. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1831. CRT,RUN,LATCH_DATA, 0x00
  1832.  
  1833.  
  1834. [800,600,24,64,100]
  1835. # Unlock CRTC
  1836. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1837. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1838. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1839. # Dump CRT Controller Registers
  1840. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  1841. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1842. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1843. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1844. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1845. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1846. CRT,RUN,MODE_CONTROL,0x02
  1847. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1848. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1849. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1850. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1851. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1852. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1853. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1854. # Lock CRTC Reg 11 for compatibility
  1855. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1856. # Dump ENG Register
  1857. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1858. # Dump MISCOUT Register
  1859. DIR,RUN,MISC_WRITE,0xef
  1860. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1861. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1862. CLK_IND, RUN, FREQ_2, 0x7e
  1863. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1864. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1865. CRT,RUN,LATCH_DATA, 0x00
  1866.  
  1867.  
  1868. [800,600,24,56,90]
  1869. # Unlock CRTC
  1870. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1871. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1872. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1873. # Dump CRT Controller Registers
  1874. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  1875. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1876. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1877. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1878. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1879. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1880. CRT,RUN,MODE_CONTROL,0x02
  1881. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1882. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1883. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1884. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1885. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1886. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1887. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1888. # Lock CRTC Reg 11 for compatibility
  1889. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1890. # Dump ENG Register
  1891. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1892. # Dump MISCOUT Register
  1893. DIR,RUN,MISC_WRITE,0xef
  1894. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1895. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1896. CLK_IND, RUN, FREQ_2, 0x70
  1897. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1898. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1899. CRT,RUN,LATCH_DATA, 0x00
  1900.  
  1901.  
  1902. [800,600,24,46,75]
  1903. # Unlock CRTC
  1904. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1905. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1906. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1907. # Dump CRT Controller Registers
  1908. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  1909. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1910. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1911. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1912. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1913. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1914. CRT,RUN,MODE_CONTROL,0x02
  1915. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1916. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1917. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1918. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1919. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1920. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1921. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1922. # Lock CRTC Reg 11 for compatibility
  1923. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1924. # Dump ENG Register
  1925. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1926. # Dump MISCOUT Register
  1927. DIR,RUN,MISC_WRITE,0xef
  1928. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1929. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1930. CLK_IND, RUN, FREQ_2, 0x60
  1931. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1932. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1933. CRT,RUN,LATCH_DATA, 0x00
  1934.  
  1935.  
  1936. [800,600,24,48,72]
  1937. # Unlock CRTC
  1938. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1939. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1940. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1941. # Dump CRT Controller Registers
  1942. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  1943. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1944. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  1945. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1946. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1947. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1948. CRT,RUN,MODE_CONTROL,0x02
  1949. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1950. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1951. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1952. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1953. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1954. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1955. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1956. # Lock CRTC Reg 11 for compatibility
  1957. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1958. # Dump ENG Register
  1959. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1960. # Dump MISCOUT Register
  1961. DIR,RUN,MISC_WRITE,0xef
  1962. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1963. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1964. CLK_IND, RUN, FREQ_2, 0x61
  1965. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1966. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1967. CRT,RUN,LATCH_DATA, 0x00
  1968.  
  1969. [800,600,24,37,60]
  1970. # Unlock CRTC
  1971. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1972. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1973. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1974. # Dump CRT Controller Registers
  1975. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  1976. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1977. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1978. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1979. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1980. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1981. CRT,RUN,MODE_CONTROL,0x02
  1982. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1983. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1984. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1985. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1986. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1987. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1988. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1989. # Lock CRTC Reg 11 for compatibility
  1990. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1991. # Dump ENG Register
  1992. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1993. # Dump MISCOUT Register
  1994. DIR,RUN,MISC_WRITE,0xef
  1995. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1996. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1997. CLK_IND, RUN, FREQ_2, 0x4d
  1998. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1999. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2000. CRT,RUN,LATCH_DATA, 0x00
  2001.  
  2002.  
  2003. [800,600,24,35,56]
  2004. # Unlock CRTC
  2005. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2006. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2007. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2008. # Dump CRT Controller Registers
  2009. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  2010. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2011. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2012. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2013. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2014. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2015. CRT,RUN,MODE_CONTROL,0x02
  2016. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2017. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2018. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2019. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2020. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2021. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2022. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2023. # Lock CRTC Reg 11 for compatibility
  2024. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2025. # Dump ENG Register
  2026. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2027. # Dump MISCOUT Register
  2028. DIR,RUN,MISC_WRITE,0xef
  2029. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2030. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2031. CLK_IND, RUN, FREQ_2, 0x45
  2032. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2033. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2034. CRT,RUN,LATCH_DATA, 0x00
  2035.  
  2036. [800,600,16,75,120]
  2037. # Unlock CRTC
  2038. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2039. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2040. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2041. # Dump CRT Controller Registers
  2042. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2043. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2044. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2045. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2046. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2047. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2048. CRT,RUN,MODE_CONTROL,0x02
  2049. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2050. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2051. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2052. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2053. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2054. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2055. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2056. # Lock CRTC Reg 11 for compatibility
  2057. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2058. # Dump ENG Register
  2059. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2060. # Dump MISCOUT Register
  2061. DIR,RUN,MISC_WRITE,0xef
  2062. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2063. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2064. CLK_IND, RUN, FREQ_2, 0x8a
  2065. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2066. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2067. CRT,RUN,LATCH_DATA, 0x00
  2068.  
  2069. [800,600,16,64,100]
  2070. # Unlock CRTC
  2071. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2072. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2073. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2074. # Dump CRT Controller Registers
  2075. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2076. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2077. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2078. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2079. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2080. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2081. CRT,RUN,MODE_CONTROL,0x02
  2082. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2083. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2084. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2085. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2086. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2087. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2088. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2089. # Lock CRTC Reg 11 for compatibility
  2090. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2091. # Dump ENG Register
  2092. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2093. # Dump MISCOUT Register
  2094. DIR,RUN,MISC_WRITE,0xef
  2095. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2096. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2097. CLK_IND, RUN, FREQ_2, 0x7e
  2098. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2099. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2100. CRT,RUN,LATCH_DATA, 0x00
  2101.  
  2102. [800,600,16,56,90]
  2103. # Unlock CRTC
  2104. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2105. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2106. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2107. # Dump CRT Controller Registers
  2108. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2109. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2110. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2111. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2112. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2113. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2114. CRT,RUN,MODE_CONTROL,0x02
  2115. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2116. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2117. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2118. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2119. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2120. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2121. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2122. # Lock CRTC Reg 11 for compatibility
  2123. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2124. # Dump ENG Register
  2125. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2126. # Dump MISCOUT Register
  2127. DIR,RUN,MISC_WRITE,0xef
  2128. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2129. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2130. CLK_IND, RUN, FREQ_2, 0x70
  2131. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2132. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2133. CRT,RUN,LATCH_DATA, 0x00
  2134.  
  2135. [800,600,16,46,75]
  2136. # Unlock CRTC
  2137. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2138. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2139. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2140. # Dump CRT Controller Registers
  2141. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2142. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2143. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2144. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2145. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2146. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2147. CRT,RUN,MODE_CONTROL,0x02
  2148. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2149. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2150. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2151. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2152. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2153. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2154. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2155. # Lock CRTC Reg 11 for compatibility
  2156. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2157. # Dump ENG Register
  2158. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2159. # Dump MISCOUT Register
  2160. DIR,RUN,MISC_WRITE,0xef
  2161. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2162. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2163. CLK_IND, RUN, FREQ_2, 0x60
  2164. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2165. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2166. CRT,RUN,LATCH_DATA, 0x00
  2167.  
  2168. [800,600,16,48,72]
  2169. # Unlock CRTC
  2170. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2171. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2172. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2173. # Dump CRT Controller Registers
  2174. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2175. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2176. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2177. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2178. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2179. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2180. CRT,RUN,MODE_CONTROL,0x02
  2181. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2182. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2183. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2184. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2185. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2186. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2187. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2188. # Lock CRTC Reg 11 for compatibility
  2189. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2190. # Dump ENG Register
  2191. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2192. # Dump MISCOUT Register
  2193. DIR,RUN,MISC_WRITE,0xef
  2194. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2195. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2196. CLK_IND, RUN, FREQ_2, 0x61
  2197. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2198. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2199. CRT,RUN,LATCH_DATA, 0x00
  2200.  
  2201. [800,600,16,37,60]
  2202. # Unlock CRTC
  2203. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2204. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2205. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2206. # Dump CRT Controller Registers
  2207. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2208. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2209. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2210. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2211. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2212. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2213. CRT,RUN,MODE_CONTROL,0x02
  2214. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2215. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2216. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2217. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2218. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2219. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2220. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2221. # Lock CRTC Reg 11 for compatibility
  2222. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2223. # Dump ENG Register
  2224. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2225. # Dump MISCOUT Register
  2226. DIR,RUN,MISC_WRITE,0xef
  2227. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2228. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2229. CLK_IND, RUN, FREQ_2, 0x4D
  2230. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2231. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2232. CRT,RUN,LATCH_DATA, 0x00
  2233.  
  2234.  
  2235. [800,600,16,35,56]
  2236. # Unlock CRTC
  2237. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2238. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2239. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2240. # Dump CRT Controller Registers
  2241. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2242. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2243. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2244. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2245. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2246. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2247. CRT,RUN,MODE_CONTROL,0x02
  2248. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2249. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2250. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2251. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2252. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2253. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2254. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2255. # Lock CRTC Reg 11 for compatibility
  2256. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2257. # Dump ENG Register
  2258. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2259. # Dump MISCOUT Register
  2260. DIR,RUN,MISC_WRITE,0xef
  2261. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2262. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2263. CLK_IND, RUN, FREQ_2, 0x45
  2264. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2265. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2266. CRT,RUN,LATCH_DATA, 0x00
  2267.  
  2268. [800,600,8,75,120]
  2269. # Unlock CRTC
  2270. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2271. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2272. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2273. # Dump CRT Controller Registers
  2274. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2275. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2276. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2277. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2278. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2279. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2280. CRT,RUN,MODE_CONTROL,0x02
  2281. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2282. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2283. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2284. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2285. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2286. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2287. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2288. # Lock CRTC Reg 11 for compatibility
  2289. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2290. # Dump ENG Register
  2291. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2292. # Dump MISCOUT Register
  2293. DIR,RUN,MISC_WRITE,0xef
  2294. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2295. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2296. CLK_IND, RUN, FREQ_2, 0x8a
  2297. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2298. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2299. CRT,RUN,LATCH_DATA, 0x08
  2300.  
  2301. [800,600,8,64,100]
  2302. # Unlock CRTC
  2303. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2304. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2305. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2306. # Dump CRT Controller Registers
  2307. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2308. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2309. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2310. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2311. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2312. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2313. CRT,RUN,MODE_CONTROL,0x02
  2314. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2315. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2316. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2317. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2318. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2319. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2320. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2321. # Lock CRTC Reg 11 for compatibility
  2322. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2323. # Dump ENG Register
  2324. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2325. # Dump MISCOUT Register
  2326. DIR,RUN,MISC_WRITE,0xef
  2327. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2328. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2329. CLK_IND, RUN, FREQ_2, 0x7e
  2330. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2331. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2332. CRT,RUN,LATCH_DATA, 0x08
  2333.  
  2334. [800,600,8,56,90]
  2335. # Unlock CRTC
  2336. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2337. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2338. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2339. # Dump CRT Controller Registers
  2340. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2341. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2342. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2343. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2344. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2345. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2346. CRT,RUN,MODE_CONTROL,0x02
  2347. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2348. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2349. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2350. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2351. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2352. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2353. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2354. # Lock CRTC Reg 11 for compatibility
  2355. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2356. # Dump ENG Register
  2357. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2358. # Dump MISCOUT Register
  2359. DIR,RUN,MISC_WRITE,0xef
  2360. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2361. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2362. CLK_IND, RUN, FREQ_2, 0x70
  2363. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2364. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2365. CRT,RUN,LATCH_DATA, 0x08
  2366.  
  2367. [800,600,8,46,75]
  2368. # Unlock CRTC
  2369. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2370. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2371. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2372. # Dump CRT Controller Registers
  2373. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2374. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2375. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2376. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2377. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2378. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2379. CRT,RUN,MODE_CONTROL,0x02
  2380. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2381. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2382. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2383. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2384. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2385. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2386. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2387. # Lock CRTC Reg 11 for compatibility
  2388. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2389. # Dump ENG Register
  2390. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2391. # Dump MISCOUT Register
  2392. DIR,RUN,MISC_WRITE,0xef
  2393. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2394. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2395. CLK_IND, RUN, FREQ_2, 0x60
  2396. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2397. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2398. CRT,RUN,LATCH_DATA, 0x08
  2399.  
  2400. [800,600,8,48,72]
  2401. # Unlock CRTC
  2402. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2403. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2404. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2405. # Dump CRT Controller Registers
  2406. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2407. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2408. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2409. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2410. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2411. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2412. CRT,RUN,MODE_CONTROL,0x02
  2413. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2414. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2415. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2416. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2417. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2418. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2419. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2420. # Lock CRTC Reg 11 for compatibility
  2421. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2422. # Dump ENG Register
  2423. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2424. # Dump MISCOUT Register
  2425. DIR,RUN,MISC_WRITE,0xef
  2426. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2427. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2428. CLK_IND, RUN, FREQ_2, 0x61
  2429. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2430. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2431. CRT,RUN,LATCH_DATA, 0x08
  2432.  
  2433. [800,600,8,37,60]
  2434. # Unlock CRTC
  2435. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2436. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2437. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2438. # Dump CRT Controller Registers
  2439. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2440. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2441. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2442. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2443. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2444. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2445. CRT,RUN,MODE_CONTROL,0x02
  2446. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2447. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2448. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2449. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2450. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2451. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2452. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2453. # Lock CRTC Reg 11 for compatibility
  2454. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2455. # Dump ENG Register
  2456. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2457. # Dump MISCOUT Register
  2458. DIR,RUN,MISC_WRITE,0xef
  2459. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2460. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2461. CLK_IND, RUN, FREQ_2, 0x4D
  2462. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2463. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2464. CRT,RUN,LATCH_DATA, 0x08
  2465.  
  2466. [800,600,8,35,56]
  2467. # Unlock CRTC
  2468. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2469. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2470. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2471. # Dump CRT Controller Registers
  2472. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2473. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2474. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2475. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2476. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2477. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2478. CRT,RUN,MODE_CONTROL,0x02
  2479. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2480. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2481. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2482. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2483. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2484. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2485. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2486. # Lock CRTC Reg 11 for compatibility
  2487. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2488. # Dump ENG Register
  2489. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2490. # Dump MISCOUT Register
  2491. DIR,RUN,MISC_WRITE,0xef
  2492. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2493. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2494. CLK_IND, RUN, FREQ_2, 0x45
  2495. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2496. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2497. CRT,RUN,LATCH_DATA, 0x08
  2498.  
  2499. [640,480,24,64,120]
  2500. # Unlock CRTC
  2501. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2502. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2503. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2504. # Dump CRT Controller Registers
  2505. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  2506. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2507. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2508. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2509. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2510. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2511. CRT,RUN,MODE_CONTROL,0x02
  2512. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2513. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2514. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2515. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2516. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2517. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2518. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2519. # Lock CRTC Reg 11 for compatibility
  2520. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2521. # Dump ENG Register
  2522. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2523. # Dump MISCOUT Register
  2524. DIR,RUN,MISC_WRITE,0xef
  2525. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2526. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2527. CLK_IND, RUN, FREQ_2, 0x67
  2528. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2529. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2530. CRT,RUN,LATCH_DATA, 0x00
  2531.  
  2532.  
  2533. [640,480,24,52,100]
  2534. # Unlock CRTC
  2535. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2536. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2537. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2538. # Dump CRT Controller Registers
  2539. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2540. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2541. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2542. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2543. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2544. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2545. CRT,RUN,MODE_CONTROL,0x02
  2546. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2547. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2548. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2549. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2550. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2551. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2552. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2553. # Lock CRTC Reg 11 for compatibility
  2554. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2555. # Dump ENG Register
  2556. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2557. # Dump MISCOUT Register
  2558. DIR,RUN,MISC_WRITE,0xef
  2559. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2560. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2561. CLK_IND, RUN, FREQ_2, 0x50
  2562. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2563. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2564. CRT,RUN,LATCH_DATA, 0x00
  2565.  
  2566. [640,480,24,48,90]
  2567. # Unlock CRTC
  2568. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2569. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2570. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2571. # Dump CRT Controller Registers
  2572. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2573. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2574. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2575. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2576. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2577. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2578. CRT,RUN,MODE_CONTROL,0x02
  2579. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2580. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2581. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2582. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2583. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2584. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2585. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2586. # Lock CRTC Reg 11 for compatibility
  2587. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2588. # Dump ENG Register
  2589. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2590. # Dump MISCOUT Register
  2591. DIR,RUN,MISC_WRITE,0xef
  2592. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2593. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2594. CLK_IND, RUN, FREQ_2, 0x4d
  2595. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2596. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2597. CRT,RUN,LATCH_DATA, 0x00
  2598.  
  2599.  
  2600. [640,480,24,37,75]
  2601. # Unlock CRTC
  2602. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2603. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2604. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2605. # Dump CRT Controller Registers
  2606. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  2607. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2608. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  2609. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  2610. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2611. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2612. CRT,RUN,MODE_CONTROL,0x02
  2613. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2614. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2615. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2616. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2617. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2618. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2619. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2620. # Lock CRTC Reg 11 for compatibility
  2621. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2622. # Dump ENG Register
  2623. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2624. # Dump MISCOUT Register
  2625. DIR,RUN,MISC_WRITE,0xef
  2626. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2627. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2628. CLK_IND, RUN, FREQ_2, 0x3a
  2629. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2630. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2631. CRT,RUN,LATCH_DATA, 0x00
  2632.  
  2633. [640,480,24,37,72]
  2634. # Unlock CRTC
  2635. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2636. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2637. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2638. # Dump CRT Controller Registers
  2639. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  2640. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2641. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2642. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2643. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2644. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2645. CRT,RUN,MODE_CONTROL,0x02
  2646. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2647. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2648. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2649. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2650. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2651. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2652. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2653. # Lock CRTC Reg 11 for compatibility
  2654. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2655. # Dump ENG Register
  2656. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2657. # Dump MISCOUT Register
  2658. DIR,RUN,MISC_WRITE,0xef
  2659. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2660. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2661. CLK_IND, RUN, FREQ_2, 0x3a
  2662. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2663. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2664. CRT,RUN,LATCH_DATA, 0x00
  2665.  
  2666. [640,480,24,31,60]
  2667. # Unlock CRTC
  2668. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2669. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2670. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2671. # Dump CRT Controller Registers
  2672. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  2673. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2674. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2675. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2676. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2677. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2678. CRT,RUN,MODE_CONTROL,0x02
  2679. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2680. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2681. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2682. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2683. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2684. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2685. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2686. # Lock CRTC Reg 11 for compatibility
  2687. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2688. # Dump ENG Register
  2689. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2690. # Dump MISCOUT Register
  2691. DIR,RUN,MISC_WRITE,0xef
  2692. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2693. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2694. CLK_IND, RUN, FREQ_2, 0x21
  2695. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2696. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2697. CRT,RUN,LATCH_DATA, 0x00
  2698.  
  2699. [640,480,32,64,120]
  2700. # Unlock CRTC
  2701. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2702. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2703. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2704. # Dump CRT Controller Registers
  2705. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2706. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2707. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2708. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2709. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2710. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2711. CRT,RUN,MODE_CONTROL,0x02
  2712. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2713. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2714. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2715. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2716. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2717. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2718. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2719. # Lock CRTC Reg 11 for compatibility
  2720. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2721. # Dump ENG Register
  2722. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2723. # Dump MISCOUT Register
  2724. DIR,RUN,MISC_WRITE,0xef
  2725. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2726. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2727. CLK_IND, RUN, FREQ_2, 0x67
  2728. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2729. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2730. CRT,RUN,LATCH_DATA, 0x00
  2731.  
  2732. [640,480,32,52,100]
  2733. # Unlock CRTC
  2734. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2735. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2736. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2737. # Dump CRT Controller Registers
  2738. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2739. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2740. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2741. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2742. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2743. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2744. CRT,RUN,MODE_CONTROL,0x02
  2745. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2746. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2747. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2748. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2749. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2750. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2751. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2752. # Lock CRTC Reg 11 for compatibility
  2753. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2754. # Dump ENG Register
  2755. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2756. # Dump MISCOUT Register
  2757. DIR,RUN,MISC_WRITE,0xef
  2758. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2759. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2760. CLK_IND, RUN, FREQ_2, 0x50
  2761. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2762. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2763. CRT,RUN,LATCH_DATA, 0x00
  2764.  
  2765. [640,480,32,48,90]
  2766. # Unlock CRTC
  2767. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2768. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2769. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2770. # Dump CRT Controller Registers
  2771. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2772. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2773. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2774. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2775. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2776. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2777. CRT,RUN,MODE_CONTROL,0x02
  2778. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2779. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2780. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2781. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2782. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2783. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2784. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2785. # Lock CRTC Reg 11 for compatibility
  2786. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2787. # Dump ENG Register
  2788. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2789. # Dump MISCOUT Register
  2790. DIR,RUN,MISC_WRITE,0xef
  2791. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2792. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2793. CLK_IND, RUN, FREQ_2, 0x4d
  2794. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2795. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2796. CRT,RUN,LATCH_DATA, 0x00
  2797.  
  2798. [640,480,32,37,75]
  2799. # Unlock CRTC
  2800. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2801. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2802. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2803. # Dump CRT Controller Registers
  2804. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2805. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2806. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2807. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2808. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2809. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2810. CRT,RUN,MODE_CONTROL,0x02
  2811. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2812. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2813. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2814. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2815. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2816. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2817. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2818. # Lock CRTC Reg 11 for compatibility
  2819. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2820. # Dump ENG Register
  2821. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2822. # Dump MISCOUT Register
  2823. DIR,RUN,MISC_WRITE,0xef
  2824. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2825. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2826. CLK_IND, RUN, FREQ_2, 0x3a
  2827. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2828. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2829. CRT,RUN,LATCH_DATA, 0x00
  2830.  
  2831. [640,480,32,37,72]
  2832. # Unlock CRTC
  2833. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2834. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2835. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2836. # Dump CRT Controller Registers
  2837. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2838. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2839. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2840. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2841. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2842. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2843. CRT,RUN,MODE_CONTROL,0x02
  2844. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2845. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2846. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2847. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2848. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2849. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2850. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2851. # Lock CRTC Reg 11 for compatibility
  2852. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2853. # Dump ENG Register
  2854. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2855. # Dump MISCOUT Register
  2856. DIR,RUN,MISC_WRITE,0xef
  2857. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2858. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2859. CLK_IND, RUN, FREQ_2, 0x3a
  2860. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2861. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2862. CRT,RUN,LATCH_DATA, 0x00
  2863.  
  2864. [640,480,32,31,60]
  2865. # Unlock CRTC
  2866. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2867. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2868. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2869. # Dump CRT Controller Registers
  2870. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2871. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2872. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2873. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2874. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2875. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2876. CRT,RUN,MODE_CONTROL,0x02
  2877. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2878. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2879. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2880. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2881. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2882. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2883. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2884. # Lock CRTC Reg 11 for compatibility
  2885. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2886. # Dump ENG Register
  2887. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2888. # Dump MISCOUT Register
  2889. DIR,RUN,MISC_WRITE,0xef
  2890. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2891. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2892. CLK_IND, RUN, FREQ_2, 0x21
  2893. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2894. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2895. CRT,RUN,LATCH_DATA, 0x00
  2896.  
  2897. [640,480,16,64,120]
  2898. # Unlock CRTC
  2899. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2900. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2901. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2902. # Dump CRT Controller Registers
  2903. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2904. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2905. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2906. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2907. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2908. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2909. CRT,RUN,MODE_CONTROL,0x02
  2910. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2911. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2912. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2913. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2914. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2915. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2916. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2917. # Lock CRTC Reg 11 for compatibility
  2918. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2919. # Dump ENG Register
  2920. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2921. # Dump MISCOUT Register
  2922. DIR,RUN,MISC_WRITE,0xef
  2923. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2924. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2925. CLK_IND, RUN, FREQ_2, 0x67
  2926. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2927. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2928. CRT,RUN,LATCH_DATA, 0x00
  2929.  
  2930. [640,480,16,52,100]
  2931. # Unlock CRTC
  2932. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2933. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2934. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2935. # Dump CRT Controller Registers
  2936. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2937. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2938. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2939. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2940. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2941. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2942. CRT,RUN,MODE_CONTROL,0x02
  2943. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2944. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2945. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2946. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2947. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2948. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2949. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2950. # Lock CRTC Reg 11 for compatibility
  2951. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2952. # Dump ENG Register
  2953. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2954. # Dump MISCOUT Register
  2955. DIR,RUN,MISC_WRITE,0xef
  2956. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2957. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2958. CLK_IND, RUN, FREQ_2, 0x50
  2959. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2960. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2961. CRT,RUN,LATCH_DATA, 0x00
  2962.  
  2963. [640,480,16,48,90]
  2964. # Unlock CRTC
  2965. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2966. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2967. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2968. # Dump CRT Controller Registers
  2969. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2970. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2971. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2972. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2973. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2974. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2975. CRT,RUN,MODE_CONTROL,0x02
  2976. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2977. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2978. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2979. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2980. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2981. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2982. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2983. # Lock CRTC Reg 11 for compatibility
  2984. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2985. # Dump ENG Register
  2986. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2987. # Dump MISCOUT Register
  2988. DIR,RUN,MISC_WRITE,0xef
  2989. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2990. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2991. CLK_IND, RUN, FREQ_2, 0x4d
  2992. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2993. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2994. CRT,RUN,LATCH_DATA, 0x00
  2995.  
  2996. [640,480,16,37,75]
  2997. # Unlock CRTC
  2998. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2999. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3000. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3001. # Dump CRT Controller Registers
  3002. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3003. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3004. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3005. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3006. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3007. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3008. CRT,RUN,MODE_CONTROL,0x02
  3009. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3010. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3011. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3012. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3013. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3014. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3015. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3016. # Lock CRTC Reg 11 for compatibility
  3017. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3018. # Dump ENG Register
  3019. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3020. # Dump MISCOUT Register
  3021. DIR,RUN,MISC_WRITE,0xef
  3022. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3023. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3024. CLK_IND, RUN, FREQ_2, 0x3a
  3025. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3026. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3027. CRT,RUN,LATCH_DATA, 0x00
  3028.  
  3029. [640,480,16,37,72]
  3030. # Unlock CRTC
  3031. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3032. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3033. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3034. # Dump CRT Controller Registers
  3035. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3036. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3037. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3038. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3039. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3040. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3041. CRT,RUN,MODE_CONTROL,0x02
  3042. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3043. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3044. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3045. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3046. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3047. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3048. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3049. # Lock CRTC Reg 11 for compatibility
  3050. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3051. # Dump ENG Register
  3052. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3053. # Dump MISCOUT Register
  3054. DIR,RUN,MISC_WRITE,0xef
  3055. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3056. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3057. CLK_IND, RUN, FREQ_2, 0x3a
  3058. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3059. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3060. CRT,RUN,LATCH_DATA, 0x00
  3061.  
  3062. [640,480,16,31,60]
  3063. # Unlock CRTC
  3064. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3065. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3066. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3067. # Dump CRT Controller Registers
  3068. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3069. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3070. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3071. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3072. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3073. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3074. CRT,RUN,MODE_CONTROL,0x02
  3075. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3076. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3077. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3078. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3079. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3080. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3081. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3082. # Lock CRTC Reg 11 for compatibility
  3083. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3084. # Dump ENG Register
  3085. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3086. # Dump MISCOUT Register
  3087. DIR,RUN,MISC_WRITE,0xef
  3088. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3089. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3090. CLK_IND, RUN, FREQ_2, 0x21
  3091. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3092. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3093. CRT,RUN,LATCH_DATA, 0x00
  3094.  
  3095. [640,480,8,64,120]
  3096. # Unlock CRTC
  3097. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3098. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3099. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3100. # Dump CRT Controller Registers
  3101. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3102. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3103. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3104. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3105. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3106. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3107. CRT,RUN,MODE_CONTROL,0x02
  3108. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3109. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3110. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3111. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3112. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3113. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3114. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3115. # Lock CRTC Reg 11 for compatibility
  3116. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3117. # Dump ENG Register
  3118. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3119. # Dump MISCOUT Register
  3120. DIR,RUN,MISC_WRITE,0xef
  3121. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3122. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3123. CLK_IND, RUN, FREQ_2, 0x67
  3124. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3125. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3126. CRT,RUN,LATCH_DATA, 0x08
  3127.  
  3128. [640,480,8,52,100]
  3129. # Unlock CRTC
  3130. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3131. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3132. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3133. # Dump CRT Controller Registers
  3134. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3135. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3136. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3137. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3138. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3139. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3140. CRT,RUN,MODE_CONTROL,0x02
  3141. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3142. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3143. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3144. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3145. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3146. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3147. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3148. # Lock CRTC Reg 11 for compatibility
  3149. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3150. # Dump ENG Register
  3151. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3152. # Dump MISCOUT Register
  3153. DIR,RUN,MISC_WRITE,0xef
  3154. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3155. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3156. CLK_IND, RUN, FREQ_2, 0x50
  3157. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3158. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3159. CRT,RUN,LATCH_DATA, 0x08
  3160.  
  3161. [640,480,8,48,90]
  3162. # Unlock CRTC
  3163. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3164. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3165. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3166. # Dump CRT Controller Registers
  3167. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3168. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3169. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3170. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3171. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3172. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3173. CRT,RUN,MODE_CONTROL,0x02
  3174. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3175. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3176. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3177. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3178. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3179. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3180. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3181. # Lock CRTC Reg 11 for compatibility
  3182. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3183. # Dump ENG Register
  3184. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3185. # Dump MISCOUT Register
  3186. DIR,RUN,MISC_WRITE,0xef
  3187. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3188. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3189. CLK_IND, RUN, FREQ_2, 0x4d
  3190. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3191. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3192. CRT,RUN,LATCH_DATA, 0x08
  3193.  
  3194. [640,480,8,37,75]
  3195. # Unlock CRTC
  3196. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3197. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3198. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3199. # Dump CRT Controller Registers
  3200. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3201. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3202. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3203. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3204. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3205. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3206. CRT,RUN,MODE_CONTROL,0x02
  3207. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3208. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3209. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3210. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3211. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3212. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3213. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3214. # Lock CRTC Reg 11 for compatibility
  3215. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3216. # Dump ENG Register
  3217. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3218. # Dump MISCOUT Register
  3219. DIR,RUN,MISC_WRITE,0xef
  3220. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3221. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3222. CLK_IND, RUN, FREQ_2, 0x3a
  3223. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3224. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3225. CRT,RUN,LATCH_DATA, 0x08
  3226.  
  3227. [640,480,8,37,72]
  3228. # Unlock CRTC
  3229. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3230. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3231. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3232. # Dump CRT Controller Registers
  3233. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3234. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3235. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3236. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3237. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3238. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3239. CRT,RUN,MODE_CONTROL,0x02
  3240. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3241. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3242. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3243. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3244. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3245. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3246. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3247. # Lock CRTC Reg 11 for compatibility
  3248. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3249. # Dump ENG Register
  3250. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3251. # Dump MISCOUT Register
  3252. DIR,RUN,MISC_WRITE,0xef
  3253. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3254. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3255. CLK_IND, RUN, FREQ_2, 0x3a
  3256. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3257. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3258. CRT,RUN,LATCH_DATA, 0x08
  3259.  
  3260. [640,480,8,31,60]
  3261. # Unlock CRTC
  3262. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3263. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3264. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3265. # Dump CRT Controller Registers
  3266. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3267. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3268. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3269. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3270. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3271. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3272. CRT,RUN,MODE_CONTROL,0x02
  3273. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3274. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3275. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3276. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3277. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3278. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3279. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3280. # Lock CRTC Reg 11 for compatibility
  3281. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3282. # Dump ENG Register
  3283. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3284. # Dump MISCOUT Register
  3285. DIR,RUN,MISC_WRITE,0xef
  3286. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3287. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3288. CLK_IND, RUN, FREQ_2, 0x21
  3289. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3290. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3291. CRT,RUN,LATCH_DATA, 0x08
  3292.  
  3293.  
  3294.  
  3295.  
  3296.  
  3297.  
  3298.